View ISL28236FUZ_8393700.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1 5mhz, dual precision rail-to-rail input-output (rrio) op amps isl28236 the isl28236 is a low-power dual operational amplifier optimized for single supply operation from 2.4v to 5.5v, allowing operation from one lithium cell or two ni-cd batteries. the device features a gain-b andwidth product of 5mhz. the isl28236 features an inpu t range enhancement circuit (irec), which enables the amplifier to maintain cmrr performance for input voltages greater than the positive supply. the input signal is capa ble of swinging 0.25v above the positive supply and to the negati ve supply with only a slight degradation of the cmrr perfor mance. the output operation is rail-to-rail. the part typically draws less than 1ma supply current per amplifier while meeting excellent dc accuracy, ac performance, noise and output drive specifications. the isl28236 is available in the 8 ld soic and the 8 ld msop. operation is guaranteed over the -40c to +125c temperature range. features ? 5mhz gain bandwidth product at a v = 100 ? 2ma typical supply current ? 240v maximum offset voltage (soic package) ? 6na typical input bias current (soic package) ? down to 2.4v single supply voltage range ? rail-to-rail input and output ? -40c to +125c operation ? pb-free (rohs compliant) applications ?low-end audio ? 4ma to 20ma current loops ?medical devices ?sensor amplifiers ?adc buffers ? dac output amplifiers related literature ? an1420 , ?isl282x6eval1z evaluation board user?s guide? ordering information part number ( notes 2 , 3 ) part marking package (pb-free) pkg. dwg. # isl28236fbz 28236 fbz 8 ld soic m8.15e isl28236fbz-t7 ( note 1) 28236 fbz 8 ld soic m8.15e isl28236fbz-t7a ( note 1) 28236 fbz 8 ld soic m8.15e ISL28236FUZ 8236z 8 ld msop m8.118a ISL28236FUZ-t7 ( note 1) 8236z 8 ld msop m8.118a ISL28236FUZ-t7a ( note 1) 8236z 8 ld msop m8.118a isl28236soiceval1z evaluation board notes: 1. please refer to tb347 for details on reel specifications. 2. these intersil pb-free plastic pack aged products employ special pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anne al (e3 termination finish, which is rohs compliant and compatible with both snpb and pb-free soldering operations). intersil pb -free products are msl classified at pb-free peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jedec j std-020. 3. for moisture sensitivity level (msl), please see product information page for isl28236 . for more information on msl, please see tech brief tb363. caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | copyright intersil americas llc 2009, 2014. all rights reserved intersil (and design) is a trademark owned by intersil corporation or one of its subsidiaries. all other trademarks mentioned are the property of their respective owners. july 24, 2014 fn6921.2
isl28236 2 fn6921.2 july 24, 2014 submit document feedback pin configurations isl28236 (8 ld soic) top view isl28236 (8 ld msop) top view pin descriptions isl28236 (8 ld soic) isl28236 (8 ld msop) pin name function equivalent circuit 2 2 in-_a inverting input circuit 1 6 6 in-_b 3 3 in+_a non-inverting input see circuit 1 5 5 in+_b 4 4 v- negative supply circuit 2 11 out_aoutput circuit 3 77 out_b 8 8 v+ positive supply see circuit 2 1 2 3 4 8 7 6 5 out_a in-_a in+_a v+ out_b in-_b v- in+_b + - +- 1 2 3 4 8 7 6 5 out_a in-_a in+_a v+ out_b in-_b v- in+_b + - +- in+ in- v+ v- v+ v- capacitively coupled esd clamp v+ v- out isl28236
isl28236 3 fn6921.2 july 24, 2014 submit document feedback absolute maximum ratings (t a = +25 c) thermal information supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.75v supply turn-on voltage slew rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1v/s differential input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5ma differential input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5v input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v- - 0.5v to v+ + 0.5v esd rating human body model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3kv machine model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300v thermal resistance (typical notes 4, 5 ) ? ja (c/w) ? jc (c/w) 8 ld soic package. . . . . . . . . . . . . . . . . . . . 120 60 8 ld msop package . . . . . . . . . . . . . . . . . . 160 55 storage temperature range. . . . . . . . . . . . . . . . . . . . . . . .-65c to +150c pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see tb493 operating conditions ambient temperature range . . . . . . . . . . . . . . . . . . . . . . .-40c to +125c junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+125c caution: do not operate at or near the maximum ratings listed for extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. notes: 4. ? ja is measured with the component mounted on a high effective thermal conductivity test board in free air. see tech brief tb379 for details. 5. for ? jc , the ?case temp? location is taken at the package top center. important note: all parameters having min/max specifications are guaranteed. typical values are for information purposes only. u nless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: t j = t c = t a electrical specifications v + = 5v, v - = 0v, v cm = 2.5v, r l = open, t a = +25c unless otherwise specified. boldface limits apply across the operating temperature range, -40c to +125c. temperature data established by characterization. parameter description test conditions min ( note 6 )typ max ( note 6 )units dc specifications v os input offset voltage 8 ld soic -240 -250 20 240 250 v 8 ld msop -270 -530 20 270 530 v input offset voltage vs temperature 0.4 v/c i os input offset current 8 ld soic t a = -40c to +125c -10 -30 210 30 na 8 ld msop t a = -40c to +125c -23 -50 223 50 na i b input bias current 8 ld soic t a = -40c to +125c -40 -50 640 50 na 8 ld msop t a = -40c to +125c -50 -70 650 70 na v cm common-mode voltage range guaranteed by cmrr 0 5 v cmrr common-mode rejection ratio v cm = 0v to 5v 90 90 115 db psrr power supply rejection ratio v + = 2.4v to 5.5v 90 90 100 db a vol large signal voltage gain 8 ld soic v o = 0.5v to 4v, r l = 100k ? to v cm 600 500 1600 v/mv 8 ld msop v o = 0.5v to 4v, r l = 100k ? to v cm 600 400 1600 v/mv v o = 0.5v to 4v, r l = 1k ? to v cm 100 v/mv ? v os ? t --------------- - isl28236
isl28236 4 fn6921.2 july 24, 2014 submit document feedback v out maximum output voltage swing output low, r l = 100k ? to v cm 110 10 mv output low, r l = 1k ? to v cm 47 70 90 mv output high, r l = 100k ? to v cm 4.99 4.99 4.997 v output high, r l = 1k ? to v cm 4.93 4.91 4.952 v i s supply current 2 2.5 2.6 ma i o + short-circuit output source current r l = 10 ? to v cm 50 40 70 ma i o - short-circuit output sink current r l = 10 ? to v cm 50 40 70 ma v supply supply operating range v + to v - 2.4 5.5 v ac specifications gbw gain bandwidth product a v = 100, r f = 100k ?? r g = r l = 10k ? to v cm 5mhz e n input noise voltage peak-to-peak f = 0.1hz to 10hz, ? r l = 10k ? to v cm 0.4 v p-p input noise voltage density f o = 1khz, ? r l = 10k ? to v cm 15 nv/ hz i n input noise current density f o = 10khz, ? r l = 10k ? to v cm 0.35 pa/ hz cmrr at 120hz input common mode rejection ratio v cm = 0.1v p-p , r l = 10k ? to v cm 90 db psrr+ at 120hz power supply rejection ratio (v+) v + , v - = 1.2v and 2.5v, v source = 0.1v p-p , r l = 10k ? to v cm 88 db psrr- at 120hz power supply rejection ratio (v-) v + , v - = 1.2v and 2.5v v source = 0.1v p-p , r l = 10k ? to v cm 105 db crosstalk at 10khz channel a to channel b v + , v - = 2.5v; a v = 1 v source = 0.4v p-p , r l = 10k ? to v cm 140 db transient response sr slew rate v out = 1.5v; r f = 50k ? r g = 50k ? to v cm 1.8 v/s t r , t f , large signal rise time, 10% to 90%, v out a v = -1, v out = 4v p-p , r l = 10k ? to v cm 2.1 s fall time, 90% to 10%, v out a v = -1, v out = 4v p-p , r l = 10k ? to v cm 2s t r , t f , small signal rise time, 10% to 90%, v out a v = +1, v out = 100mv p-p , r l = 10k ? to v cm 60 ns fall time, 90% to 10%, v out a v = +1 v out = 100mv p-p , r l = 10k ? to v cm 50 ns t s, settling time to 0.01%; 4v step v out = 4v p-p ; r l = 10k ? to v cm 5.1 s note: 6. parameters with min and/or max limits are 100% tested at +25c , unless otherwise specified. te mperature limits established by characterization and are not production tested. electrical specifications v + = 5v, v - = 0v, v cm = 2.5v, r l = open, t a = +25c unless otherwise specified. boldface limits apply across the operating temperature range, -40c to +125c. temperature data established by characterization. (continued) parameter description test conditions min ( note 6 )typ max ( note 6 )units isl28236
isl28236 5 fn6921.2 july 24, 2014 submit document feedback typical performance curves v + = 5v, v - = 0v, v cm = 2.5v, r l = open. plots labeled min, median, and max correspond to a distribution of devices in the soic package. figure 1. input offset voltage vs common-mode input voltage figure 2. gain vs frequency vs feedback resistor values r f /r g figure 3. gain vs frequency vs v out , r l = 10k figure 4. gain vs frequency vs r l figure 5. frequency response vs closed loop gain figure 6. gain vs frequency vs supply voltage -100 -80 -60 -40 -20 0 20 40 60 80 100 -10123456 v cm (v) v os (v) v + = 5v r l = open a v = +1000 r f = 100k, r g = 100 10k 100k 1m 10m 100m frequency (hz) gain (db) -10 -8 -6 -4 -2 0 2 4 6 8 10 1k 100 rf = ri = 1k rf = ri = 100k rf = ri = 10k v s = 5v a v = +2 v out = 10mv p-p c l = 4pf -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 v s = 5v c l = 4pf a v = +1 r l = 10k v out = 50mv v out = 100mv v out = 10mv v out = 1v 10k 100k 1m 10m 100m frequency (hz) normalized gain (db) -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 10k 100k 1m 10m 100m frequency (hz) normalized gain (db) r l = 10k v + = 5v a v = +1 v out = 10mv p-p c l = 4pf r l = 1k r l = 100k -10 0 10 20 30 40 50 60 70 100 1k 10k 100k 1m 10m 100m frequency (hz) a v = 1 a v = 10 a v = 101 a v = 1001 v + = 5v v out = 10mv p-p c l = 16.3pf r l = 10k gain (db) a v = 1001, r g = 1k, r f = 1m a v = 10, r g = 1k, r f = 9.09k a v = 1, r g = inf, r f = 0 a v = 101, r g = 1k, r f = 100k 10k 100k 1m 10m 100m frequency (hz) normalized gain (db) -9 -8 -7 -6 -5 -4 -3 -2 -1 0 1 r l = 10k a v = +1 v out = 10mv p-p c l = 4pf v s = 5v v s = 2.4v isl28236
isl28236 6 fn6921.2 july 24, 2014 submit document feedback figure 7. gain vs frequency vs c l figure 8. cmrr vs frequency; v + = 2.4v and 5v figure 9. psrr vs frequency, v + , v - = 1.2v figure 10. psrr vs frequency, v + , v - = 2.5v figure 11. crosstalk vs frequency, v + , v - = 2.5v figure 12. input noise voltage density vs frequency typical performance curves v + = 5v, v - = 0v, v cm = 2.5v, r l = open. plots labeled min, median, and max correspond to a distribution of devices in the soic package. (continued) -8 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 10k 100k 1m 10m 100m frequency (hz) normalized gain (db) c l = 26pf c l = 16pf c l = 4pf v s = 5v r l = 10k a v = +1 v out = 10mv p-p c l = 37pf cmrr (db) 100 1k 10k 100k 1m 10m frequency (hz) 10 -20 0 20 40 60 80 100 120 1 0.1 r l = 10k a v = +1 v cm = 100mv p-p c l = 4pf v s = 5v v s = 2.4v psrr (db) 100 1k 10k 100k 1m 10m frequency (hz) 10 -20 0 20 40 60 80 100 120 1 0.1 psrr- psrr+ v + , v - = 1.2v r l = 10k a v = +1 v source = 100mv p-p c l = 4pf psrr (db) frequency (hz) -20 0 20 40 60 80 100 120 psrr- psrr+ v + , v - = 2.5v r l = 10k a v = +1 v source = 100mv p-p c l = 4pf 100 1k 10k 100k 1m 10m 10 1 0.1 crosstalk (db) 0 20 40 60 80 100 120 140 160 10k 100k 1m 10m 100m frequency (hz) 1k 100 v + , v - = 2.5v r l = 10k receiving channel a v = +1 v source = 400mv p-p c l = 4pf r l = open transmit channel 10 10 100 1 10 100 1k 10k 100k frequency (hz) input noise voltage (nv?hz) v + = 5v r l = 1k a v = +1 c l = 16.3pf isl28236
isl28236 7 fn6921.2 july 24, 2014 submit document feedback figure 13. input current no ise density vs frequency figure 14. input noise voltage 0.1hz to 10hz figure 15. large signal step response figure 16. small signal step response figure 17. supply current vs temperature vs supply voltage figure 18. negative supply current vs temperature, v +, v - = 2.5v typical performance curves v + = 5v, v - = 0v, v cm = 2.5v, r l = open. plots labeled min, median, and max correspond to a distribution of devices in the soic package. (continued) 0.1 1 10 1 10 100 1k 10k 100k frequency (hz) input current noise (pa?hz) v + = 5v r l = 1k a v = +1 c l = 16.3pf -0.5 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 012345678910 time (s) input noise (v) v + = 5v r l = 10k r g = 10, r f = 100k a v = 10000 c l = 16.3pf time (s) large signal (v) -2.5 -2.0 -1.5 -1.0 -0.5 0 0.5 1.0 1.5 2.0 2.5 0 1020304050607080 v + , v - = 2.5v r l = 1k and 10k a v = 2 v out = 4v p-p c l = 4pf time (s) small signal (v) -60 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 v + , v - = 1.2v and 2.5v c l = 4pf a v = 1 r l = 1k and 10k v out = 100mv p-p -40 -20 0 20 40 60 80 100 120 temperature (c) current (ma) 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 vs = 2.5v vs = 2.875v vs = 1.5v -40-200 20406080100120 temperature (c) current (ma) -2.5 -2.3 -2.1 -1.9 -1.7 -1.5 min median max isl28236
isl28236 8 fn6921.2 july 24, 2014 submit document feedback figure 19. v os vs temperature, v +, v - = 1.2v figure 20. v os vs temperature, v +, v - = 2.5v figure 21. i bias + vs temperature, v +, v - = 2.5v figure 22. i bias - vs temperature, v +, v - = 2.5v figure 23. i bias + vs temperature, v +, v - = 1.2v figure 24. i bias - vs temperature, v +, v - = 1.2v typical performance curves v + = 5v, v - = 0v, v cm = 2.5v, r l = open. plots labeled min, median, and max correspond to a distribution of devices in the soic package. (continued) -40 -20 0 20 40 60 80 100 120 temperature (c) v os (v) -150 -100 -50 0 50 100 150 200 min median max -150 -100 -50 0 50 100 150 200 min median max -40 -20 0 20 40 60 80 100 120 temperature (c) v os (v) -40 -20 0 20 40 60 80 100 120 temperature (c) i bias + (na) -30 -25 -20 -15 -10 -5 0 5 10 15 min median max -40 -20 0 20 40 60 80 100 120 temperature (c) i bias - (na) -30 -25 -20 -15 -10 -5 0 5 10 15 min median max -40-200 20406080100120 temperature (c) i bias - (na) -10 -5 0 5 10 15 20 25 30 min median max -40-200 20406080100120 temperature (c) i bias - (na) -10 -5 0 5 10 15 20 25 30 min median max isl28236
isl28236 9 fn6921.2 july 24, 2014 submit document feedback figure 25. i os vs temperature, v +, v - = 2.5v figure 26. i os vs temperature, v +, v - = 1.2v figure 27. cmrr vs temperature, v +, v - = 2.5v figure 28. psrr vs temperature, v +, v - = 1.2v figure 29. avol vs temperature, v +, v - = 2.5v, v o = -2v to +2v, r l = 100k figure 30. avol vs temperature, v +, v - = 2.5v, v o = -2v to +2v, r l = 1k typical performance curves v + = 5v, v - = 0v, v cm = 2.5v, r l = open. plots labeled min, median, and max correspond to a distribution of devices in the soic package. (continued) -40 -20 0 20 40 60 80 100 120 temperature (c) i os (na) -10 -8 -6 -4 -2 0 2 4 6 8 10 12 min median max -40 -20 0 20 40 60 80 100 120 temperature (c) i os (na) -10 -8 -6 -4 -2 0 2 4 6 8 10 12 min median max -40 -20 0 20 40 60 80 100 120 temperature (c) cmrr (db) 90 100 110 120 130 140 150 160 170 min median max -40 -20 0 20 40 60 80 100 120 temperature (c) psrr (db) 90 100 110 120 130 140 150 160 min median max 0 20406080100120 temperature (c) avol (v/mv) min median max -40 -20 60 560 1060 1560 2060 2560 3060 3560 4060 -40 -20 0 20 40 60 80 100 120 temperature (c) avol (v/mv) 60 80 100 120 140 160 180 200 220 min median max isl28236
isl28236 10 fn6921.2 july 24, 2014 submit document feedback figure 31. v out high vs temperature, v +, v - = 2.5v, r l = 1k figure 32. v out low vs temperature, v +, v - = 2.5v, r l =1k figure 33. v out high vs temperature, v +, v - = 2.5v, r l = 100k figure 34. v out low vs temperature, v +, v - = 2.5v, r l = 100k figure 35. slew rate rise vs temperature, v out = 1.5v , v p-p v + , v - = 2.5v, rl = 100k typical performance curves v + = 5v, v - = 0v, v cm = 2.5v, r l = open. plots labeled min, median, and max correspond to a distribution of devices in the soic package. (continued) 4.935 4.940 4.945 4.950 4.955 4.960 4.965 -40 -20 0 20 40 60 80 100 120 temperature (c) v out (v) min median max -40 -20 0 20 40 60 80 100 120 temperature (c) v out (mv) 35 40 45 50 55 60 65 70 min max median 4.9955 4.9960 4.9965 4.9970 4.9975 4.9980 4.9985 -40 -20 0 20 40 60 80 100 120 temperature (c) v out (v) min median max -40-200 20406080100120 temperature (c) v out (mv) 0.35 0.55 0.75 0.95 1.15 1.35 1.55 1.75 min median max -40 -20 0 20 40 60 80 100 120 temperature (c) 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 slew rate rise (v/s) min median max isl28236
isl28236 11 fn6921.2 july 24, 2014 submit document feedback applications information introduction the isl28236 is a dual channel bi-cmos rail-to-rail input, output (rrio) micropower precision operational amplifier. the part is designed to operate from a single supply (2.4v to 5.5v) or a dual supply (1.2v to 2.75v). the isl28236 has an input common mode range that extends 0.25v above the positive rail and down to the negative supply rail. the output operation can swing within about 3mv of the supply rails with a 100k load. rail-to-rail input many rail-to-rail input stages use two differential input pairs, a long-tail pnp (or pfet) and an npn (or nfet). severe penalties have to be paid for this circuit topology. as the input signal moves from one supply rail to anothe r, the operational amplifier switches from one input pair to the other. thus causing drastic changes in input offset voltag e and an undesired change in magnitude and polarity of input offset current. the isl28236 solves this problem us ing an internal charge pump to provide a voltage boost to the v+ supply rail driving the input differential pair. this results in extending the input common voltage rails to 0.25v beyond the v+ positive rail. the input offset voltage exhibits a smooth behavi or throughout the extended common-mode input range. the input bias current versus the common-mode voltage range gives an undistorted behavior from the negative rail to 0.25v higher than the positive rail. power supply decoupling the internal charge pump operates at approximately 27mhz and oscillator ripple doesn?t show up in the 5mhz bandwidth of the amplifier. good power supply decoup ling with 0.01f capacitors at each device power supply pin, is the most effective way to reduce oscillator ripple at the amplifier output. figure 36 shows the electrical connection of these capacitors using split power supplies. for single supply operation with v- tied to a ground plane, only a single 0.01f capacitor from v+ is needed. when multiple isl28236 op amps are used on a single pc board, each op amp will require a 0.01f decoupling capacitor at each supply pin. rail-to-rail output the rail-to-rail output stage uses cmos devices that typically swing to within 3mv of th e supply rails with a 100k load. the nmos sinks current to swing the output in the negative direction. the pmos sources current to swing the output in the positive direction. current limiting these devices have no internal cu rrent limiting circuitry. if the output is shorted, it is possibl e to exceed the absolute maximum rating for output current or power dissipation, potentially resulting in the destruction of the device. results of overdriving the output caution should be used when overdriving the output for long periods of time. overdriving the output can occur in two ways. 1. the input voltage times the gain of the amplifier exceeds the supply voltage by a large value or, 2. the output current required is higher than the output stage can deliver. these conditions can result in a shift in the input offset voltage (v os ) (as much as 1v/hr. of expo sure) under these conditions. in+ and in- input protection all input terminals have internal esd protection diodes to both positive and negative supply rails, limiting the input voltage to within one diode beyond the su pply rails. they also contain back-to-back diodes across the input terminals (see ? pin descriptions ? on page 2 - circuit 1 ) . for applications where the input differential voltage is expected to exceed 0.5v, an external series resistor must be used to ensure the input currents never exceed 5ma ( figure 36 ). limitations of the differential input protection if the input differential voltage is expected to exceed 0.5v, an external current limiting resistor must be used to ensure the input current never exceeds 5ma. for non-inverting unity gain applications, the current limiting ca n be via a series in+ resistor, or via a feedback resistor of appropriate value. for other gain configurations, the series in+ resist or is the best choice, unless the feedback (r f ) and gain setting (r g ) resistors are both sufficiently large to limit the input current to 5ma. large differential input voltages can arise from several sources: 1. during open loop (comparator) operation. used this way, the in+ and in- voltages don?t track, so differentials arise. 2. when the amplifier is disabled but an input signal is still present. an r l or r g to gnd keeps the in- at gnd, while the varying in+ signal creates a di fferential voltage. mux amp applications are similar, exce pt that the active channel v out determines the voltage on the in- terminal. 3. when the slew rate of the inpu t pulse is considerably faster than the op amp?s slew rate. if the v out can?t keep up with the in+ signal, a differential voltage results, and visible distortion occurs on the input and output signals. to avoid this issue, keep the input slew rate below 1.9v/s, or use appropriate current limiting resistors. large (>2v) differential input voltages can also cause an increase in disabled i cc . figure 36. local power supply decoupling and input current limiting - + r in r l v in v out v+ v- 0.01f 0.01f decoupling capacitors isl28236
isl28236 12 fn6921.2 july 24, 2014 submit document feedback using only one channel if the application only requires one channel, the user must configure the unused channel to prevent it from oscillating. the unused channel will oscillate if the input and output pins are floating. this will result in high er than expected supply currents and possible noise injection into the channel being used. the proper way to prevent this oscillation is to short the output to the negative input and ground the positive input (as shown in figure 37 ). power dissipation it is possible to exceed the +125c maximum junction temperatures under certain load and power supply conditions. it is therefore important to ca lculate the maximum junction temperature (t jmax ) for all applications to determine if power supply voltages, load conditions , or package type need to be modified to remain in the safe operating area. these parameters are related in equation 1 : where: ?p dmaxtotal is the sum of the maximum power dissipation of each amplifier in the package (pd max ) ?pd max for each amplifier can be calculated using equation 2 : where: ?t max = maximum ambient temperature ? ? ja = thermal resistance of the package ?pd max = maximum power dissipation of 1 amplifier ?v s = total supply voltage ?i smax = maximum supply current of 1 amplifier ?v outmax = maximum output voltage swing of the application ?r l = load resistance figure 37. preventing oscillations in unused channels - + t jmax t max ? ja xpd maxtotal ?? + = (eq. 1) pd max v s i smax v s ? - v outmax ? v outmax r l ---------------------------- ? + ? = (eq. 2)
isl28236 13 intersil products are manufactured, assembled and tested utilizing iso9001 quality systems as noted in the quality certifications found at www.intersil.com/en/suppor t/qualandreliability.html intersil products are sold by description only. intersil corporat ion reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnished by intersil is believed to be accurate and reliable. however, no responsi bility is assumed by intersil or its subsid iaries for its use; nor for any infringem ents of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of i ntersil or its subsidiaries. for information regarding intersil corporation and its products, see www.intersil.com fn6921.2 july 24, 2014 for additional products, see www.intersil.com/en/products.html submit document feedback about intersil intersil corporation is a leading provider of innovative power ma nagement and precision analog so lutions. the company's product s address some of the largest markets within the industrial and infrastr ucture, mobile computing and high-end consumer markets. for the most updated datasheet, application notes, related documentatio n and related parts, please see the respective product information page found at www.intersil.com . you may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask . reliability reports are also av ailable from our website at www.intersil.com/support revision history the revision history provided is for informational purposes only and is believed to be accurate, but not warranted. please go t o the web to make sure that you have the latest revision. date revision change july 24, 2014 fn6921.2 ordering information table on page 1: added t7a parts and evaluation board. thermal information table on page 3: added theta jc values to soic and msop package and updated the notes. may 20, 2014 fn6921.1 updated to new template updated ordering information table by removing ?coming soon? from fuz parts, pkg dwg #?s changed from mdp0027 to m8.15e (soic) and mdp0043 to m8.1 18a (msop), numbered all notes, added msl note updated electrical specifications table by adding conditions for package extension. added rev history and about intersil verbiage. june 11, 2009 fn6921.0 initial release.
isl28236 14 fn6921.2 july 24, 2014 submit document feedback isl28236 package outline drawing m8.15e 8 lead narrow body small outline plastic package rev 0, 08/09 unless otherwise specified, tolerance : decimal 0.05 the pin #1 identifier may be either a mold or mark feature. interlead flash or protrusions shall not exceed 0.25mm per side. dimension does not include interlead flash or protrusions. dimensions in ( ) for reference only. dimensioning and tolerancing conform to amse y14.5m-1994. 3. 5. 4. 2. dimensions are in millimeters. 1. notes: detail "a" side view ?a typical recommended land pattern top view a b 4 4 0.25 a mc b c 0.10 c 5 id mark pin no.1 (0.35) x 45 seating plane gauge plane 0.25 (5.40) (1.50) 4.90 0.10 3.90 0.10 1.27 0.43 0.076 0.63 0.23 4 4 detail "a" 0.22 0.03 0.175 0.075 1.45 0.1 1.75 max (1.27) (0.60) 6.0 0.20 reference to jedec ms-012. 6. side view ?b?
isl28236 15 fn6921.2 july 24, 2014 submit document feedback isl28236 package outline drawing m8.118a 8 lead mini small outlin e plastic package (msop) rev 0, 9/09 plastic or metal protrusions of 0.15mm max per side are not dimensions ?d? and ?e1? are measured at datum plane ?h?. this replaces existing drawing # mdp0043 msop 8l. plastic interlead protrusions of 0.25mm max per side are not dimensioning and tolerancing conform to jedec mo-187-aa 6. 3. 5. 4. 2. dimensions are in millimeters. 1. notes: detail "x" side view 1 typical recommended land pattern top view side view 2 included. included. gauge plane 33 0.25 c a b b 0.10 c 0.08 c a b a 0.25 0.55 0.15 0.95 bsc 0.18 0.05 1.10 max c h 4.40 3.00 5.80 0.65 3.00.1 4.90.15 1.40 0.40 0.65 bsc pin# 1 id detail "x" 0.33 +0.07/ -0.08 0.10 0.05 3.00.1 1 2 8 0.860.09 seating plane and amse y14.5m-1994.

▲Up To Search▲

Price & Availability of ISL28236FUZ

	To Download ISL28236FUZ Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .